Item |
Specification |
Input/Output |
I/O format |
Non-isolated LVTTL-level I/O (Positive logic) *1 |
Number of I/O channels |
48 channels (all available for interrupts) |
Interrupt |
48 interrupt input signals are arranged into a single output of interrupt signal INT.
An interrupt is generated at the falling edge(HIGH-to-LOW transition)
or rising edge (LOW-to-HIGH transition).
|
Response time |
Within 200nsec |
Rated output current |
IOL=8mA (Max.) IOH=-8mA (Max.) |
Common |
Built-in power |
None |
Allowable distance of signal extension |
Approx. 1.5m (depending on wiring environment) |
Interruption level |
1 level use |
Max. Numbers of board for connection |
16 boards including the master board |
I/O address |
Any 32-byte boundary (Common to I/O part) |
Power consumption (Max) |
3.3VDC 300mA |
Operating condition |
0 - 50°C, 10 - 90%RH (No condensation) |
Bus specification |
PCI Express Base Specification Rev. 1.0a x 1 |
Dimension (mm) |
121.69 (L) x 67.90 (H) |
Connector used |
68 pin 0.8mm pitch connector
HDRA-E68LFDT+ [HONDA TSUSHIN KOGYO CO., LTD.] or equivalent |
Weight |
60g |
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