purple02_next.gifCommunication GPIB-FL-LPE

GPIB-FL-LPE

 High Speed GPIB (Low Profile)

PIN Assignment & Etc

GPIB-F-LPE,GPIB-FL-LPE

Item

GPIB-F-LPE

GPIB-FL-LPE

GPIB

Number of channel

1 channel
Conforms to IEEE-488.1, 488.2(GPIB)

Transfer format

8-bit parallel, 3-wire handshake system

Transfer rate

1.5Mbyte/sec

Data buffer size

2Kbyte send, 2Kbyte receive

Signal logic

Negative logic L level : 0.8V or less, H level : 2.0V or more

Cable length between device

4m or less *1

Total cable length

20m or less

Connectable number of device

15 devices

Analyzer buffer size

64K data points
(1 data point : Control signals + DIO1 - 8)

None

Bus master section

DMA channels

2 channels

Transfer bus width

32bit

Transfer data length

8 PCI Words length (Max.)

Transfer rate

80Mbyte/sec

Scatter/Gather function

64Mbyte/ch

Scatter/Gather function

I/O address

Any 128-byte boundary

Interrupt

1 level use

Consumed current (Max.)

3.3VDC600mA

Operating conditions

0 - 50°C,10 - 90%RH (No condensation)

Bus specification

PCI Express Base Specification Rev. 1.0a x1

External dimensions (mm)

121.69(L)×67.90(H)

Connector

Micro ribbon connector (24-pin)
5555139-1 [made by AMP] or equivalent

Weight

110g

 Software

API-PAC(W32),API-GPIB(LNX)

Accessories

 

Cable (option)

Multi-function
AIO-163202F-PE includes analog input (16bit, 32ch), analog output (16bit, 2ch), eight digital inputs, eight digital outputs and counter functions (32bit binary 2ch), for computers with limited numbers of expansion slots to be used in configuring complicated systems.

Event controller for diverse sampling control
AIO-163202F-PE provides central management (via hardware) for start/stop/clock control of analog input/output operations. Easily combines event functions and external control signal inputs for high level synchronous control that is independent of controlling software. Individual operation of each function is also possible.

Bus master transfer and complex data input
Both analog input and output utilize bus master transfer (either individually or concurrently), allowing bulk data transfer between the host computer and the board with no additional load on the CPU. Simultaneous transfer is available for data using bus master transfer (analog and digital input, digital output and count data) if they are synchronized with the analog input clock signals.

Buffer memory for software independent background processing
Both analog input and output feature onboard buffer memory for use when bus master transfer is not used. The buffer memory can be used as FIFO or RING. This function also allows input/output in the background without depending on system operation status of either the host computer or the software.

Setup and adjustment performed via software
Setup and adjustment, such as those concerning the range of analog input and output is done via software, eliminating the need to change jumper settings. It can also recognize any adjustment information that is different from that set at the factory. This allows for optimum settings for individual applications.

Synchronous control function
AIO-163202F-PE includes a synchronous control function that is capable of synchronizing control of multiple boards (up to 16), enabling to start analog inputs simultaneously.

Event controller for diverse sampling control
AIO-163202F-PE provides central management (via hardware) for start/stop/clock control of analog input/output operations. Easily combines event functions and external control signal inputs for high level synchronous control that is independent of controlling software. Individual operation of each function is also possible.

Filtering for facilitation in the connection of external signals
External analog input/output, digital input/output and counter input/output are equipped with a digital filter for the prevention of chatter.